行业动态
流片信息
知识园地
IP目录
USB2.0 OTG PHY
USB2.0 OTG PHY
USB1.1 PHY
USB2.0 OTG PHY
USB2.0 OTG PHY
USB2.0 OTG PHY
USB2.0 OTG PHY
65/55nm, 1.5mW/ 0.4mm², Stereo DAC SNR 95dB, THD+N -80dB at 44.1kHz, 3.3V, Stereo ADC SNR 90dB, THD+N -75dB at 44.1kHz, 3.3V
130nm, Compliant with UTMI Specification Version 1.05
0.18um, Compliant with standard A/standard B/micro B/mini B; D+/D- pin can meet the handshaking detections of different portable devices
This multi-mode transceiver IP with PMA and PCS layer is designed for low power and high performance application.
40nm, 4 Channel per Quad, X4~X12 Quads, 300Mbps~10.3125Gbps, Low Power Consumption (PCS+PMA)
55nm, Support connectivity to DDR2/3 SDRAM, Support up to 1066Mbps data rate using the supplied IOs
55nm, Single link HDMI receiver with PHY and Controller, Fully compliant with HDMI 1.4b specification and DVI 1.0 specification
55nm, 16-bit unidirectional interface with 30MHz System Clock, 8-bit unidirectional interface with 60MHz System Clock
55nm-LP CMOS Process
40nm-LP CMOS Process, Operation Voltage Range: 3.3v for output driver, 1.1v for core function block
BCS_PCIe_IP是一款基于PCIe总线技术和AMBA AHB总线技术的高速接口IP。
LVDS IP包含驱动器和接收器,通信数据率大于800Mbps,完全满足ANSI TIA/EIA-644标准的要求,同时可以方便扩展为并行LVDS接口使用,支持低功耗休眠模式。
这是一款兼容PCI-Express2.0和1.1协议的物理层(PHY)IP,可配置为4通道或1通道,单通道的传输速率可达5Gbps/2.5Gbps,同时具备PIPE2协议接口,使用方便。